Preamplifier

ABSTRACT

A preamplifier including a programmable gain amplifying circuit and a filtering circuit is provided. The programmable gain amplifying circuit has a single output terminal. The filtering circuit includes a first switched-capacitor filter and a second switched-capacitor filter. The first switched-capacitor filter is coupled to the single output terminal. The second switched-capacitor filter is connected in parallel with the first switched-capacitor filter. The first switched-capacitor filter and the second switched-capacitor filter are respectively switched between a first mode and a second mode. When the first switched-capacitor filter is switched to the first mode, the second switched-capacitor filter is switched to the second mode.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan applicationserial no. 104130707, filed on Sep. 17, 2015. The entirety of theabove-mentioned patent application is hereby incorporated by referenceherein and made a part of this specification.

BACKGROUND OF THE INVENTION

Field of the Invention

The invention relates to a preamplifier and more particularly relates toa preamplifier with a filtering circuit.

Description of Related Art

An analog front end (AFE) is composed of an analog circuit and a digitaland analog mixed circuit and is in charge of performing many operations,such as signal acquisition, analog filtering, and so on. Thepreamplifier in the analog front end plays an important role in signalacquisition and it usually determines the resolution and signal-to-noiseratio of the system. Generally, the preamplifier amplifies adifferential input signal through a chopper amplifier and filters thehigher harmonics caused by the input offset voltage of the chopperamplifier through a filtering circuit.

However, the filtering circuits in the existing preamplifiers are mostlyformed by one single capacitor. In addition, the capacitor that formsthe filtering circuit needs to be very large so as to filter the higherharmonic caused by the input offset voltage. As a result, the hardwarecosts of the preamplifier increase and miniaturization of thepreamplifier is limited.

SUMMARY OF THE INVENTION

The invention provides a preamplifier that utilizes a switched-capacitorfilter to form a filtering circuit, so as to reduce hardware costs ofthe preamplifier and help to achieve miniaturization of thepreamplifier.

The preamplifier of the invention includes a programmable gainamplifying circuit and a filtering circuit. The programmable gainamplifying circuit has a single output terminal. The filtering circuitincludes a first switched-capacitor filter and a secondswitched-capacitor filter. The first switched-capacitor filter iscoupled to the single output terminal. The second switched-capacitorfilter is connected in parallel with the first switched-capacitorfilter. The first switched-capacitor filter and the secondswitched-capacitor filter are respectively switched between a first modeand a second mode. When the first switched-capacitor filter is switchedto the first mode, the second switched-capacitor filter is switched tothe second mode.

Based on the above, the preamplifier of the invention utilizes the firstswitched-capacitor filter and the second switched-capacitor filter toform the filtering circuit, and the first switched-capacitor filter andthe second switched-capacitor filter are connected in parallel and havethe same circuit structure. In terms of switching of the operationmodes, the switching sequence of the first switched-capacitor filter isopposite to the switching sequence of the second switched-capacitorfilter. The filtering circuit formed by the first switched-capacitorfilter and the second switched-capacitor filter is conducive to reducingthe hardware costs of the preamplifier and achieving miniaturization ofthe preamplifier.

To make the aforementioned more comprehensible, several embodimentsaccompanied with drawings are described in detail as follows.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a furtherunderstanding of the invention, and are incorporated in and constitute apart of this specification. The drawings illustrate exemplaryembodiments of the invention and, together with the description, serveto explain the principles of the invention.

FIG. 1 is a circuit diagram of a preamplifier according to an embodimentof the invention.

FIG. 2 is a timing diagram for explaining the preamplifier according toan embodiment of the invention.

FIG. 3 is a circuit diagram of a chopper amplifier according to anembodiment of the invention.

DESCRIPTION OF THE EMBODIMENTS

FIG. 1 is a circuit diagram of a preamplifier according to an embodimentof the invention. As shown in FIG. 1, a preamplifier 10 includes aprogrammable gain amplifying circuit 110 and a filtering circuit 120.The programmable gain amplifying circuit 110 has a single outputterminal 113. The filtering circuit 120 includes a firstswitched-capacitor filter 121 and a second switched-capacitor filter122. The first switched-capacitor filter 121 is coupled to the singleoutput terminal 113 of the programmable gain amplifying circuit 110. Thefirst switched-capacitor filter 121 is connected in parallel with thesecond switched-capacitor filter 122.

The first switched-capacitor filter 121 and the secondswitched-capacitor filter 122 have the same first mode and second mode,and each of the first switched-capacitor filter 121 and the secondswitched-capacitor filter 122 is switched between the first mode and thesecond mode. In terms of operation, when the first switched-capacitorfilter 121 is switched to the first mode, the second switched-capacitorfilter 122 is switched to the second mode. When the firstswitched-capacitor filter 121 is switched to the second mode, the secondswitched-capacitor filter 122 is switched to the first mode.

Thereby, an attenuation slope of the filtering circuit 120 in a stopbandmay reach −40 dB/decade, so as to effectively filter a harmoniccomponent, e.g. a higher harmonic caused by an input offset voltage, inan output signal of the programmable gain amplifying circuit 110. Inaddition, because the filtering circuit 120 is formed by the firstswitched-capacitor filter 121 and the second switched-capacitor filter122, a cutoff frequency of the filtering circuit 120 is determined by aratio of a plurality of capacitors in the first switched-capacitorfilter 121 and the second switched-capacitor filter 122. In other words,the preamplifier 10 may adjust the ratio of the plurality of capacitorsto adjust the cutoff frequency of the filtering circuit 120, therebyreducing the layout area of the filtering circuit 120. Accordingly, thehardware costs of the preamplifier 10 can be reduced and miniaturizationof the preamplifier 10 can be achieved.

Furthermore, the first switched-capacitor filter 121 and the secondswitched-capacitor filter 122 have the same circuit structure. Namely,the first switched-capacitor filter 121 includes a first switch SW11, afirst capacitor C1, a second switch SW12, and a second capacitor C2. Afirst terminal of the first switch SW11 is coupled to the single outputterminal 113 of the programmable gain amplifying circuit 110. The firstcapacitor C1 is coupled between a second terminal of the first switchSW11 and a ground. A first terminal of the second switch SW12 is coupledto the second terminal of the first switch SW11. The second capacitor C2is coupled between a second terminal of the second switch SW12 and theground. Moreover, in the first mode, the first switch SW11 is turned onwhile the second switch SW12 is turned off. In the second mode, thefirst switch SW11 is turned off while the second switch SW12 is turnedon.

Similarly, the second switched-capacitor filter 122 includes a thirdswitch SW13, a third capacitor C3, a fourth switch SW14, and a fourthcapacitor C4. A first terminal of the third switch SW13 is coupled tothe first terminal of the first switch SW11. The third capacitor C3 iscoupled between a second terminal of the third switch SW13 and theground. A first terminal of the fourth switch SW14 is coupled to thesecond terminal of the third switch SW13. The fourth capacitor C4 iscoupled between a second terminal of the fourth switch SW14 and theground. Moreover, in the first mode, the third switch SW13 is turned onwhile the fourth switch SW14 is turned off. In the second mode, thethird switch SW13 is turned off while the fourth switch SW14 is turnedon.

In other words, the first switched-capacitor filter 121 includes thefirst switch SW11 and the second switch SW12 that are connected inseries. The first switch SW11 is coupled to the ground through the firstcapacitor C1, and the second switch SW12 is coupled to the groundthrough the second capacitor C2. Similarly, the secondswitched-capacitor filter 122 includes the third switch SW13 and thefourth switch SW14 that are connected in series. The third switch SW13is coupled to the ground through the third capacitor C3, and the fourthswitch SW14 is coupled to the round through the fourth capacitor C4.

It should be noted that the cutoff frequency of the filtering circuit120 is proportional to the ratio of the first capacitor C1 and thesecond capacitor C2 and the ratio of the third capacitor C3 and thefourth capacitor C4. In other words, the cutoff frequency of thefiltering circuit 120 may be adjusted by adjusting the ratio of twocapacitors. Since the cutoff frequency of the filtering circuit 120 isproportional to the ratio of the two capacitors, the cutoff frequency ofthe filtering circuit 120 remains unchanged when the capacitance valuesof the two capacitors are reduced proportionally. Therefore, the layoutarea of the filtering circuit 120 can be reduced to achieveminiaturization of the preamplifier 10.

Further, FIG. 2 is a timing diagram for explaining the preamplifieraccording to an embodiment of the invention. As shown in FIG. 1 and FIG.2, in the first switched-capacitor filter 121, the first switch SW11 iscontrolled by a first control signal S11 and the second switch SW12 iscontrolled by a second control signal S12. The first control signal S11and the second control signal S12 are two non-overlapping signals, so asto switch the first switched-capacitor filter 121 between the first modeand the second mode.

In terms of switching of the operation modes, a switching sequence ofthe second switched-capacitor filter 122 is opposite to a switchingsequence of the first switched-capacitor filter 121. Thus, the thirdswitch SW13 is controlled by the second control signal S12 and thefourth switch SW14 is controlled by the first control signal S11. Whenthe first switched-capacitor filter 121 is switched to the first mode,the second switched-capacitor filter 122 is switched to the second mode.That is, when the first switch SW11 is turned on and the second switchSW12 is turned off, the third switch SW13 is turned off and the fourthswitch SW14 is turned on.

On the other hand, when the first switched-capacitor filter 121 isswitched to the second mode, the second switched-capacitor filter 122 isswitched to the first mode. That is, when the first switch SW11 isturned off and the second switch SW12 is turned on, the third switchSW13 is turned on and the fourth switch SW14 is turned off. Because thefirst switched-capacitor filter 121 and the second switched-capacitorfilter 122 are connected in parallel and their switching sequences ofthe operation modes are opposite to each other, the filtering circuit120 achieves a favorable filtering effect. For example, in FIG. 2, thecurve S21 indicates the output signal generated by the programmable gainamplifying circuit 110 in response to the differential input signal VIN,and the curve S22 indicates the signal outputted by the filteringcircuit 120. As shown by the curves S21 and S22 of FIG. 2, the filteringcircuit 120 effectively filters the harmonic component in the outputsignal of the programmable gain amplifying circuit 110, so as togenerate an amplified DC signal.

With reference to FIG. 1 again, the programmable gain amplifying circuit110 includes a chopper amplifier 140 and a variable resistor 150. Anon-inverting input terminal IN1 of the chopper amplifier 140 forms afirst input terminal 111 of the programmable gain amplifying circuit110, and an output terminal OUT of the chopper amplifier 140 forms thesingle output terminal 113 of the programmable gain amplifying circuit110. A first terminal of the variable resistor 150 forms a second inputterminal 112 of the programmable gain amplifying circuit 110, a secondterminal of the variable resistor 150 is coupled to an inverting inputterminal IN2 of the chopper amplifier 140, and a third terminal of thevariable resistor 150 is coupled to the output terminal OUT of thechopper amplifier 140 (i.e. the single output terminal 113 of theprogrammable gain amplifying circuit 110). Thereby, the chopperamplifier 140 forms a negative feedback configuration through thevariable resistor 150, such that the programmable gain amplifyingcircuit 110 may amplify the differential input signal VIN through thechopper amplifier 140 having the negative feedback configuration. Theprogrammable gain amplifying circuit 110 may adjust the variableresistor 150 to adjust a preset gain for amplifying the differentialinput signal VIN.

To make the invention more comprehensible to those skilled in the art,FIG. 3 is a circuit diagram of a chopper amplifier according to anembodiment of the invention. As shown in FIG. 3, the chopper amplifier140 includes a first switching unit 310, an input stage 320, a secondswitching unit 330, and an output stage 340. The input stage 320 and theoutput stage 340 may be respectively formed by a transconductanceamplifier. Two input terminals of the input stage 320 are coupled to thefirst switching unit 310, and two output terminals of the input stage320 are coupled to the second switching unit 330. Moreover, two inputterminals of the output stage 340 are coupled to the second switchingunit 330.

The first switching unit 310 includes switches SW31-SW34. When theswitch SW31 and the switch SW34 are turned on, the switch SW32 and theswitch SW33 are turned off. When the switch SW31 and the switch SW34 areturned off, the switch SW32 and the switch SW33 are turned on. Throughswitching of the switches SW31-SW34, the first switching unit 310 formsa modulator. Similarly, the second switching unit 330 includes switchesSW35-SW38. In addition, when the switch SW35 and the switch SW38 areturned on, the switch SW36 and the switch SW37 are turned off. When theswitch SW35 and the switch SW38 are turned off, the switch SW36 and theswitch SW37 are turned on. Thereby, the second switching unit 330 alsoforms a modulator.

In terms of operation, the first switching unit 310 may modulate thedifferential input signal VIN, so as to transpose the differential inputsignal VIN to an odd harmonic of a chopper frequency. The input stage320 amplifies an input offset voltage Vos and the modulated differentialinput signal VIN. The second switching unit 330 modulates the offsetvoltage Vos and modulates the differential input signal VIN again.Through the second modulation performed by the second switching unit330, the differential input signal VIN is transposed back to theoriginal frequency band. In addition, the chopper amplifier 140 onlyperforms one modulation on the input offset voltage Vos through thesecond switching unit 330. Thus, the input offset voltage Vos istransposed to the odd harmonic of the chopper frequency. The outputstage 340 converts the differential output signal generated by thesecond switching unit 330 to a single-ended signal to serve as theoutput signal of the programmable gain amplifying circuit 110. In otherwords, the programmable gain amplifying circuit 110 may modulate theinput offset voltage Vos to a high frequency band through the chopperamplifier 140, and the filtering circuit 120 may filter the highharmonic caused by the input offset voltage Vos.

In an embodiment of the invention, the preamplifier 10 further includesan operational amplifier 130. A non-inverting input ten al of theoperational amplifier 130 is coupled to the filtering circuit 120, andan inverting input terminal of the operational amplifier 130 iselectrically connected to an output terminal of the operationalamplifier 130. The operational amplifier 130 may serve as a buffer.Accordingly, the preamplifier 10 may output the signal through thebuffer formed by the operational amplifier 130, thereby preventing theoutput voltage from being affected by the back-end load.

In conclusion, the preamplifier of the invention utilizes the first andsecond switched-capacitor filters that have the same circuit structureto form the filtering circuit, and the first and secondswitched-capacitor filters are connected in parallel. In terms ofswitching of the operation modes, the switching sequence of the firstswitched-capacitor filter is opposite to the switching sequence of thesecond switched-capacitor filter. Thus, the filtering circuit achieves afavorable filtering effect. In addition, the filtering circuit formed bythe first and second switched-capacitor filters is conducive to reducingthe hardware costs of the preamplifier and achieving miniaturization ofthe preamplifier.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the disclosed embodimentswithout departing from the scope or spirit of the invention. In view ofthe foregoing, it is intended that the invention covers modificationsand variations of this disclosure provided that they fall within thescope of the following claims and their equivalents.

What is claimed is:
 1. A preamplifier, comprising: a programmable gainamplifying circuit, comprising a single output terminal; and a filteringcircuit comprising: a first switched-capacitor filter, coupled to thesingle output terminal; and a second switched-capacitor filter,connected in parallel with the first switched-capacitor filter, whereinthe first switched-capacitor filter and the second switched-capacitorfilter are respectively switched between a first mode and a second mode,and when the first switched-capacitor filter is switched to the firstmode, the second switched-capacitor filter is switched to the secondmode.
 2. The preamplifier according to claim 1, wherein the firstswitched-capacitor filter comprises: a first switch, comprising a firstterminal coupled to the single output terminal; a first capacitor,coupled between a second terminal of the first switch and a ground; asecond switch, comprising a first terminal coupled to the secondterminal of the first switch; and a second capacitor, coupled between asecond terminal of the second switch and the ground, wherein the firstswitch is turned on and the second switch is turned off in the firstmode, and the first switch is turned off and the second switch is turnedon in the second mode.
 3. The preamplifier according to claim 2, whereinthe first switched-capacitor filter and the second switched-capacitorfilter have the same circuit structure.
 4. The preamplifier according toclaim 1, wherein the first switched-capacitor filter comprises a firstswitch and a second switch that are connected in series, the secondswitched-capacitor filter comprises a third switch and a fourth switchthat are connected in series, and the first switch and the third switchare directly coupled to the single output terminal of the programmablegain amplifying circuit, wherein the third switch is turned off and thefourth switch is turned on when the first switch is turned on and thesecond switch is turned off, and the third switch is turned on and thefourth switch is turned off when the first switch is turned off and thesecond switch is turned on.
 5. The preamplifier according to claim 4,wherein the first switched-capacitor filter further comprises a firstcapacitor and a second capacitor, the first switch is coupled to aground through the first capacitor, and the second switch is coupled tothe ground through the second capacitor.
 6. The preamplifier accordingto claim 4, wherein the second switched-capacitor filter furthercomprises a third capacitor and a fourth capacitor, the third switch iscoupled to a ground through the third capacitor, and the fourth switchis coupled to the ground through the fourth capacitor.
 7. Thepreamplifier according to claim 1, wherein the programmable gainamplifying circuit comprises: a chopper amplifier, comprising anon-inverting input terminal, which forms a first input terminal of theprogrammable gain amplifying circuit, and an output terminal, whichforms the single output terminal; and a variable resistor, comprising afirst terminal, which forms a second input terminal of the programmablegain amplifying circuit, a second terminal, which is coupled to aninverting input terminal of the chopper amplifier, and a third terminal,which is coupled to the single output terminal.
 8. The preamplifieraccording to claim 7, wherein the chopper amplifier comprises: a firstswitching unit, modulating a differential input signal received by thechopper amplifier; an input stage, coupled to the first switching unitand amplifying the modulated differential input signal and an inputoffset voltage; a second switching unit, coupled to the input stage, andthe second switching unit modulating the input offset voltage andmodulating the differential input signal again to generate adifferential output signal; and an output stage, converting thedifferential output signal to a single-ended signal.
 9. The preamplifieraccording to claim 1, further comprising: an operational amplifier,comprising a non-inverting input terminal, which is coupled to thefiltering circuit, and an output terminal and an inverting inputterminal of the operational amplifier are coupled to each other.